Convolutional neural networks (CNNs) have emerged to provide powerful discriminative capability, especially in the world of image recognition and object detection. However, their massive computation requirements, storage and memory accesses make them hard to be deployed on mobile or embedded systems. In this talk, several optimization schemes for Convolutional neural networks (CNNs) will be first reviewed. Some hardware architectures of computing platforms for executing CNN are also reviewed. We will then discuss the usefulness of the optimization methods and especially emphasize the quantization technique since it can benefit many kinds of computing architectures. A dedicated hardware architecture design for face detection will also be shown as an example.
Shao-Yi Chien received the B.S. and Ph.D. degrees from the Department of Electrical Engineering, National Taiwan University (NTU), Taipei, Taiwan, in 1999 and 2003, respectively. During 2003 to 2004, he was a research staff in Quanta Research Institute, Tao Yuan County, Taiwan. In 2004, he joined the Graduate Institute of Electronics Engineering and Department of Electrical Engineering, National Taiwan University, as an Assistant Professor. Since 2012, he has been a Professor. Dr. Chien is the Associate Chair of Department of Electrical Engineering of National Taiwan University from 2013 to 2016. From 2017, he is a visiting professor in Intel Lab. His research interests include video analysis, computer vision, perceptual coding technology, image processing for digital still cameras and display devices, computer graphics, and the associated VLSI and processor architectures.
Dr. Chien served as an Associate Editor for IEEE Transactions on Circuits and Systems for Video Technology, IEEE Transactions on Circuits and Systems I: Regular Papers, and Springer Circuits, Systems and Signal Processing (CSSP). He also served as a Guest Editor for Springer Journal of Signal Processing Systems in 2008. He also serves on the technical program committees of several conferences, such as ISCAS, ICME, SiPS, A-SSCC, and VLSI-DAT.